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-rw-r--r--src/soc/intel/skylake/chip.h3
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c4
2 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 15e211e209..d397c4e488 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -199,9 +199,6 @@ struct soc_intel_skylake_config {
/* Integrated Sensor */
u8 IshEnable;
- /* SPI related */
- u8 ShowSpiController;
-
u8 PttSwitch;
u8 HeciTimeouts;
u8 HsioMessaging;
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index e8bb877230..6d1310a2ed 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -111,6 +111,10 @@ void soc_memory_init_params(MEMORY_INIT_UPD *params)
params->IoBufferOwnership = config->IoBufferOwnership;
params->DspEnable = config->DspEnable;
params->XdciEnable = config->XdciEnable;
+
+ /* Show SPI controller if enabled in devicetree.cb */
+ dev = dev_find_slot(0, PCH_DEVFN_SPI);
+ params->ShowSpiController = dev->enabled;
}
void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,