diff options
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 20 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 8 | ||||
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 38 | ||||
| -rw-r--r-- | src/soc/intel/skylake/pmc.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/systemagent.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/skylake/smmrelocate.c | 2 |
6 files changed, 27 insertions, 56 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 910db970f6..869ca7f1ee 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -174,8 +174,7 @@ static int get_cores_per_package(void) static void acpi_create_gnvs(global_nvs_t *gnvs) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC); /* Set unknown wake source */ gnvs->pm1i = -1; @@ -234,9 +233,8 @@ unsigned long acpi_fill_madt(unsigned long current) void acpi_fill_fadt(acpi_fadt_t *fadt) { - const struct device *dev = SA_DEV_ROOT; - const config_t *config = dev ? dev->chip_info : NULL; const uint16_t pmbase = ACPI_BASE_ADDRESS; + config_t *config = config_of_path(SA_DEVFN_ROOT); /* Use ACPI 3.0 revision */ fadt->header.revision = get_acpi_table_revision(FADT); @@ -284,7 +282,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK; - if (config && config->s0ix_enable) + if (config->s0ix_enable) fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; fadt->reset_reg.space_id = 1; @@ -506,8 +504,7 @@ void generate_cpu_entries(struct device *device) int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); int numcpus = totalcores/cores_per_package; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT); int is_s0ix_enable = config->s0ix_enable; int max_c_state; @@ -519,7 +516,7 @@ void generate_cpu_entries(struct device *device) printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - if (config && config->eist_enable && config->speed_shift_enable) { + if (config->eist_enable && config->speed_shift_enable) { struct cppc_config cppc_config; cpu_init_cppc_config(&cppc_config, 2 /* version 2 */); acpigen_write_CPPC_package(&cppc_config); @@ -619,11 +616,11 @@ unsigned long northbridge_write_acpi_tables(struct device *const dev, unsigned long current, struct acpi_rsdp *const rsdp) { - const struct soc_intel_skylake_config *const config = dev->chip_info; + const struct soc_intel_skylake_config *const config = config_of(dev); acpi_dmar_t *const dmar = (acpi_dmar_t *)current; /* Create DMAR table only if we have VT-d capability. */ - if ((config && config->ignore_vtd) || !soc_is_vtd_capable()) + if (config->ignore_vtd || !soc_is_vtd_capable()) return current; printk(BIOS_DEBUG, "ACPI: * DMAR\n"); @@ -695,8 +692,7 @@ void southbridge_inject_dsdt(struct device *device) /* Save wake source information for calculating ACPI _SWS values */ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC); struct chipset_power_state *ps; static uint32_t gpe0_sts[GPE0_REG_MAX]; uint32_t pm1_en; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index a1fced293d..5b61df3c68 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -233,15 +233,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; static struct soc_intel_skylake_config *config; + struct device *dev; uintptr_t vbt_data = (uintptr_t)vbt_get(); int i; - struct device *dev = SA_DEV_ROOT; - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - config = dev->chip_info; + config = config_of_path(SA_DEVFN_ROOT); mainboard_silicon_init_params(params); /* Set PsysPmax if it is available from DT */ diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index df08959cc8..5f4ce87236 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -116,8 +116,8 @@ void set_power_limits(u8 power_limit_1_time) unsigned int power_unit; unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1; u8 power_limit_1_val; - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr)) power_limit_1_time = 28; @@ -240,13 +240,13 @@ void set_power_limits(u8 power_limit_1_time) static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr; + /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && conf && conf->tcc_offset) { + if ((msr.lo & (1 << 30)) && conf->tcc_offset) { msr = rdmsr(MSR_TEMPERATURE_TARGET); msr.lo &= ~(0xf << 24); /* Bits 27:24 */ msr.lo |= (conf->tcc_offset & 0xf) << 24; @@ -260,10 +260,10 @@ static void configure_thermal_target(void) static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr; + if (conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP @@ -286,21 +286,19 @@ static void configure_isst(void) static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "SA_DEV_ROOT device not found!\n"); - return; - } - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr; + msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ + if (conf->eist_enable) msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ else msr.lo &= ~(1 << 16); /* Enhanced SpeedStep Disable */ + wrmsr(IA32_MISC_ENABLE, msr); /* Disable Thermal interrupts */ @@ -558,19 +556,7 @@ void cpu_lock_sgx_memory(void) int soc_fill_sgx_param(struct sgx_param *sgx_param) { - struct device *dev = SA_DEV_ROOT; - config_t *conf; - - if (!dev) { - printk(BIOS_ERR, "Failed to get root dev for checking SGX param\n"); - return -1; - } - - conf = dev->chip_info; - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for SGX param\n"); - return -1; - } + config_t *conf = config_of_path(SA_DEVFN_ROOT); sgx_param->enable = conf->sgx_enable; return 0; diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 01def44b06..c382131ebd 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -181,7 +181,7 @@ static void config_deep_sx(uint32_t deepsx_config) void pmc_soc_init(struct device *dev) { - const config_t *config = dev->chip_info; + const config_t *config = config_of(dev); rtc_init(); @@ -233,12 +233,7 @@ BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); */ static void pm1_handle_wake_pin(void *unused) { - struct device *dev = SA_DEV_ROOT; - - if (!dev || !dev->chip_info) - return; - - const config_t *conf = dev->chip_info; + const config_t *conf = config_of_path(SA_DEVFN_ROOT); /* If WAKE# pin is enabled, bail out early. */ if (conf->deep_sx_config & DSX_EN_WAKE_PIN) diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c index 00f620ff14..9b7ea2470e 100644 --- a/src/soc/intel/skylake/romstage/systemagent.c +++ b/src/soc/intel/skylake/romstage/systemagent.c @@ -26,13 +26,11 @@ static void systemagent_vtd_init(void) { - const struct device *const root_dev = pcidev_path_on_root(SA_DEVFN_ROOT); const struct device *const igd_dev = pcidev_path_on_root(SA_DEVFN_IGD); const struct soc_intel_skylake_config *config = NULL; - if (root_dev) - config = root_dev->chip_info; - if (config && config->ignore_vtd) + config = config_of_path(SA_DEVFN_ROOT); + if (config->ignore_vtd) return; const bool vtd_capable = diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 12ed26a56e..72861874c9 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -265,7 +265,7 @@ static void setup_ied_area(struct smm_relocation_params *params) void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); printk(BIOS_DEBUG, "Setting up SMI for CPU\n"); |