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-rw-r--r--src/soc/intel/skylake/acpi.c4
-rw-r--r--src/soc/intel/skylake/cpu.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index c46cfeb9a6..f6eb6595cb 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2009 coresystems GmbH
* Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
+ * Copyright (C) 2015-2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -519,7 +519,7 @@ void generate_cpu_entries(struct device *device)
printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n",
numcpus, cores_per_package);
- if (config->eist_enable && config->speed_shift_enable) {
+ if (config && config->eist_enable && config->speed_shift_enable) {
struct cppc_config cppc_config;
cpu_init_cppc_config(&cppc_config, 2 /* version 2 */);
acpigen_write_CPPC_package(&cppc_config);
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 0f0518aeaf..413fbbb130 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015-2017 Intel Corporation.
+ * Copyright (C) 2015-2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -248,7 +248,7 @@ static void configure_thermal_target(void)
/* Set TCC activation offset if supported */
msr = rdmsr(MSR_PLATFORM_INFO);
- if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
+ if ((msr.lo & (1 << 30)) && conf && conf->tcc_offset) {
msr = rdmsr(MSR_TEMPERATURE_TARGET);
msr.lo &= ~(0xf << 24); /* Bits 27:24 */
msr.lo |= (conf->tcc_offset & 0xf) << 24;