diff options
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 9 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/chipset_fsp_util.h | 41 | ||||
| -rw-r--r-- | src/soc/intel/skylake/ramstage.c | 3 |
4 files changed, 2 insertions, 53 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 32ecb5d60b..38668da4b1 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -61,19 +61,12 @@ smm-$(CONFIG_SPI_FLASH_SMM) += flash_controller.c smm-y += tsc_freq.c smm-$(CONFIG_UART_DEBUG) += uart_debug.c -CPPFLAGS_common += -I$(src)/arch/x86/include/ CPPFLAGS_common += -I$(src)/soc/intel/skylake CPPFLAGS_common += -I$(src)/soc/intel/skylake/include +# Currently used for microcode path. CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR) -CPPFLAGS_common += -I$(src)/drivers/intel/fsp1_1 -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/Ia32 -CPPFLAGS_common += -I$(CONFIG_FSP_INCLUDE_PATH) - # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware # image outside of CBFS diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 2c498838b5..afb0ff6b70 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -23,7 +23,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <fsp_util.h> +#include <fsp/util.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <string.h> diff --git a/src/soc/intel/skylake/include/soc/chipset_fsp_util.h b/src/soc/intel/skylake/include/soc/chipset_fsp_util.h deleted file mode 100644 index 2c05f01b79..0000000000 --- a/src/soc/intel/skylake/include/soc/chipset_fsp_util.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#ifndef _CHIPSET_FSP_UTIL_H_ -#define _CHIPSET_FSP_UTIL_H_ - -/* - * Include the FSP binary interface files - * - * These files include the necessary UEFI constants and data structures - * that are used to interface to the FSP binary. - */ - -#include <uefi_types.h> /* UEFI data types */ -#include <IntelFspPkg/Include/FspApi.h> /* FSP API definitions */ -#include <IntelFspPkg/Include/FspInfoHeader.h> /* FSP binary layout */ -#include <MdePkg/Include/Pi/PiBootMode.h> /* UEFI boot mode definitions */ -#include <MdePkg/Include/Pi/PiFirmwareFile.h> /* UEFI file definitions */ -#include <MdePkg/Include/Pi/PiFirmwareVolume.h> /* UEFI file system defs */ -#include <MdePkg/Include/Uefi/UefiMultiPhase.h> /* UEFI memory types */ -#include <MdePkg/Include/Pi/PiHob.h> /* Hand off block definitions */ -#include <MdePkg/Include/Library/HobLib.h> /* HOB routine declarations */ -#include <FspUpdVpd.h> /* Vital/updatable product data definitions */ - -#endif /* _CHIPSET_FSP_UTIL_H_ */ diff --git a/src/soc/intel/skylake/ramstage.c b/src/soc/intel/skylake/ramstage.c index 51e9b31d65..3646843e87 100644 --- a/src/soc/intel/skylake/ramstage.c +++ b/src/soc/intel/skylake/ramstage.c @@ -18,9 +18,6 @@ * Foundation, Inc. */ -#include <bootstate.h> -#include <console/console.h> -#include <fsp_util.h> #include <soc/ramstage.h> #include <soc/intel/common/ramstage.h> |