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-rw-r--r--src/soc/intel/skylake/chip.h3
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c2
2 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 4d92410b65..f4744c9631 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -90,9 +90,6 @@ struct soc_intel_skylake_config {
/* Whether to ignore VT-d support of the SKU */
int ignore_vtd;
- /* Probeless Trace function */
- u8 ProbelessTrace;
-
/*
* System Agent dynamic frequency configuration
* When enabled memory will be trained at two different frequencies.
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 79fb46425d..c826187c4b 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -216,7 +216,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->MmioSize = 0x800; /* 2GB in MB */
m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
- m_cfg->ProbelessTrace = config->ProbelessTrace;
+ m_cfg->ProbelessTrace = 0;
m_cfg->SaGv = config->SaGv;
m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
m_cfg->RMT = config->Rmt;