diff options
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r-- | src/soc/intel/skylake/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/finalize.c | 19 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/pmc.h | 1 |
3 files changed, 7 insertions, 14 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 6bdb615a72..c6e3a229de 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -42,6 +42,7 @@ config CPU_SPECIFIC_OPTIONS select REG_SCRIPT select SA_ENABLE_DPR select PMC_GLOBAL_RESET_ENABLE_LOCK + select PMC_LOW_POWER_MODE_PROGRAM select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 0294a725b2..ff3218981a 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -13,6 +13,7 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/p2sb.h> #include <intelblocks/pcr.h> +#include <intelblocks/pmclib.h> #include <intelblocks/tco.h> #include <intelblocks/thermal.h> #include <spi-generic.h> @@ -44,17 +45,13 @@ static void pch_disable_heci(void) static void pch_finalize_script(struct device *dev) { - uint32_t reg32; - uint8_t *pmcbase; config_t *config; - u8 reg8; tco_lockdown(); /* Display me status before we hide it */ intel_me_status(); - pmcbase = pmc_mmio_regs(); config = config_of(dev); /* @@ -73,18 +70,12 @@ static void pch_finalize_script(struct device *dev) * Disabling ACPI PM timer also switches off TCO */ - if (config->PmTimerDisabled) { - reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL); - reg8 |= (1 << 1); - write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8); - } + if (config->PmTimerDisabled) + pmc_disable_acpi_timer(); /* Disable XTAL shutdown qualification for low power idle. */ - if (config->s0ix_enable) { - reg32 = read32(pmcbase + CPPMVRIC); - reg32 |= XTALSDQDIS; - write32(pmcbase + CPPMVRIC, reg32); - } + if (config->s0ix_enable) + pmc_ignore_xtal_shutdown(); /* we should disable Heci1 based on the devicetree policy */ if (config->HeciEnabled == 0) diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h index 6d52b9dbc5..350649a211 100644 --- a/src/soc/intel/skylake/include/soc/pmc.h +++ b/src/soc/intel/skylake/include/soc/pmc.h @@ -78,6 +78,7 @@ #define PMSYNC_TPR_CFG 0xc4 #define PMSYNC_LOCK (1 << 31) #define PCH_PWRM_ACPI_TMR_CTL 0xfc +#define ACPI_TIM_DIS (1 << 1) #define GPIO_GPE_CFG 0x120 #define GPE0_DWX_MASK 0xf #define GPE0_DW_SHIFT(x) (4*(x)) |