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Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 760dcc1e8c..a93407620b 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -186,8 +186,8 @@ asmlinkage void car_stage_entry(void)
}
/* Cache the ROM as WP just below 4GiB. */
- postcar_frame_add_mtrr(&pcf, 0xFFFFFFFF - CONFIG_ROM_SIZE + 1,
- CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
+ postcar_frame_add_mtrr(&pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE,
+ MTRR_TYPE_WRPROT);
run_postcar_phase(&pcf);
}