diff options
Diffstat (limited to 'src/soc/intel/skylake/romstage/power_state.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/power_state.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c index bdb3da9c3b..7a6c8b3960 100644 --- a/src/soc/intel/skylake/romstage/power_state.c +++ b/src/soc/intel/skylake/romstage/power_state.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,7 +15,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ #include <arch/early_variables.h> @@ -29,14 +30,14 @@ #include <stdlib.h> #include <string.h> #include <soc/iomap.h> -#include <soc/lpc.h> +#include <soc/pmc.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> static struct chipset_power_state power_state CAR_GLOBAL; -static void migrate_power_state(void) +static void migrate_power_state(int is_recovery) { struct chipset_power_state *ps_cbmem; struct chipset_power_state *ps_car; @@ -50,7 +51,7 @@ static void migrate_power_state(void) } memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); } -CAR_MIGRATE(migrate_power_state); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) /* Return 0, 3, or 5 to indicate the previous sleep state. */ static int prev_sleep_state(struct chipset_power_state *ps) @@ -60,7 +61,7 @@ static int prev_sleep_state(struct chipset_power_state *ps) if (ps->pm1_sts & WAK_STS) { switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) case SLP_TYP_S3: prev_sleep_state = SLEEP_STATE_S3; break; @@ -73,7 +74,7 @@ static int prev_sleep_state(struct chipset_power_state *ps) outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); } - if (ps->gen_pmcon3 & (PWR_FLR | SUS_PWR_FLR)) + if (ps->gen_pmcon_b & (PWR_FLR | SUS_PWR_FLR)) prev_sleep_state = SLEEP_STATE_S5; return prev_sleep_state; @@ -94,8 +95,8 @@ static void dump_power_state(struct chipset_power_state *ps) ps->gpe0_en[0], ps->gpe0_en[1], ps->gpe0_en[2], ps->gpe0_en[3]); - printk(BIOS_DEBUG, "GEN_PMCON: %04x %04x %04x\n", - ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3); + printk(BIOS_DEBUG, "GEN_PMCON: %04x %04x\n", + ps->gen_pmcon_a, ps->gen_pmcon_b); printk(BIOS_DEBUG, "Previous Sleep State: S%d\n", ps->prev_sleep_state); @@ -104,13 +105,16 @@ static void dump_power_state(struct chipset_power_state *ps) /* Fill power state structure from ACPI PM registers */ struct chipset_power_state *fill_power_state(void) { + uint16_t tcobase; struct chipset_power_state *ps = car_get_var_ptr(&power_state); + tcobase = pmc_tco_regs(); + ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS); ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN); ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); - ps->tco1_sts = inw(ACPI_BASE_ADDRESS + TCO1_STS); - ps->tco2_sts = inw(ACPI_BASE_ADDRESS + TCO2_STS); + ps->tco1_sts = inw(tcobase + TCO1_STS); + ps->tco2_sts = inw(tcobase + TCO2_STS); ps->gpe0_sts[0] = inl(ACPI_BASE_ADDRESS + GPE0_STS(0)); ps->gpe0_sts[1] = inl(ACPI_BASE_ADDRESS + GPE0_STS(1)); ps->gpe0_sts[2] = inl(ACPI_BASE_ADDRESS + GPE0_STS(2)); @@ -120,9 +124,8 @@ struct chipset_power_state *fill_power_state(void) ps->gpe0_en[2] = inl(ACPI_BASE_ADDRESS + GPE0_EN(2)); ps->gpe0_en[3] = inl(ACPI_BASE_ADDRESS + GPE0_EN(3)); - ps->gen_pmcon1 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_1); - ps->gen_pmcon2 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_2); - ps->gen_pmcon3 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_3); + ps->gen_pmcon_a = pci_read_config16(PCH_DEV_PMC, GEN_PMCON_A); + ps->gen_pmcon_b = pci_read_config16(PCH_DEV_PMC, GEN_PMCON_B); ps->prev_sleep_state = prev_sleep_state(ps); |