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Diffstat (limited to 'src/soc/intel/skylake/pch.c')
-rw-r--r--src/soc/intel/skylake/pch.c31
1 files changed, 1 insertions, 30 deletions
diff --git a/src/soc/intel/skylake/pch.c b/src/soc/intel/skylake/pch.c
index ed64c8f66c..7084fa28a4 100644
--- a/src/soc/intel/skylake/pch.c
+++ b/src/soc/intel/skylake/pch.c
@@ -15,16 +15,15 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
-#include <soc/spi.h>
u8 pch_revision(void)
{
@@ -36,34 +35,6 @@ u16 pch_type(void)
return pci_read_config16(PCH_DEV_LPC, PCI_DEVICE_ID);
}
-void *get_spi_bar(void)
-{
- device_t dev = PCH_DEV_SPI;
- uint32_t bar;
-
- bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
- /* Bits 31-12 are the base address as per EDS for SPI 1F/5,
- * Don't care about 0-11 bit
- */
- return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK);
-}
-
-u32 pch_read_soft_strap(int id)
-{
- uint32_t fdoc;
- void *spibar = get_spi_bar();
-
- fdoc = read32(spibar + SPIBAR_FDOC);
- fdoc &= ~0x00007ffc;
- write32(spibar + SPIBAR_FDOC, fdoc);
-
- fdoc |= 0x00004000;
- fdoc |= id * 4;
- write32(spibar + SPIBAR_FDOC, fdoc);
-
- return read32(spibar + SPIBAR_FDOD);
-}
-
#if ENV_RAMSTAGE
void pch_enable_dev(device_t dev)
{