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Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/bootblock.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h2
-rw-r--r--src/soc/intel/skylake/include/soc/smbus.h24
3 files changed, 3 insertions, 24 deletions
diff --git a/src/soc/intel/skylake/include/soc/bootblock.h b/src/soc/intel/skylake/include/soc/bootblock.h
index f290d0f668..10c8de1241 100644
--- a/src/soc/intel/skylake/include/soc/bootblock.h
+++ b/src/soc/intel/skylake/include/soc/bootblock.h
@@ -30,7 +30,6 @@ void bootblock_pch_early_init(void);
void pch_uart_init(void);
/* Bootblock post console init programing */
-void enable_smbus(void);
void i2c_early_init(void);
void pch_early_init(void);
void pch_early_iorange_init(void);
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index 7112c77a24..15c291cc96 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -51,7 +51,7 @@
#define INTEL_USB2_EN (1 << 18)
#define LEGACY_USB2_EN (1 << 17)
#define PERIODIC_EN (1 << 14)
-#define TCO_EN (1 << 13)
+#define TCO_SMI_EN (1 << 13)
#define MCSMI_EN (1 << 11)
#define BIOS_RLS (1 << 7)
#define SWSMI_TMR_EN (1 << 6)
diff --git a/src/soc/intel/skylake/include/soc/smbus.h b/src/soc/intel/skylake/include/soc/smbus.h
index 1e4d59bc24..ad5ae2611c 100644
--- a/src/soc/intel/skylake/include/soc/smbus.h
+++ b/src/soc/intel/skylake/include/soc/smbus.h
@@ -20,14 +20,12 @@
#define _SOC_SMBUS_H_
/* PCI Configuration Space (D31:F3): SMBus */
-#define SMB_BASE 0x20
-#define HOSTC 0x40
-#define HST_EN (1 << 0)
#define SMB_RCV_SLVA 0x09
+
/* SMBUS TCO base address. */
#define TCOBASE 0x50
#define TCOCTL 0x54
-#define SMBUS_TCO_EN (1 << 8)
+#define TCO_EN (1 << 8)
/* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
#define TCO1_STS 0x04
@@ -39,24 +37,6 @@
#define TCO_TMR_HLT (1 << 11)
/* SMBus I/O bits. */
-#define SMBHSTSTAT 0x0
-#define SMBHSTCTL 0x2
-#define SMBHSTCMD 0x3
-#define SMBXMITADD 0x4
-#define SMBHSTDAT0 0x5
-#define SMBHSTDAT1 0x6
-#define SMBBLKDAT 0x7
-#define SMBTRNSADD 0x9
-#define SMBSLVDATA 0xa
-#define SMLINK_PIN_CTL 0xe
-#define SMBUS_PIN_CTL 0xf
-
-#define SMBUS_TIMEOUT (10 * 1000 * 100)
#define SMBUS_SLAVE_ADDR 0x24
-int do_smbus_read_byte(unsigned int smbus_base, unsigned int device,
- unsigned int address);
-int do_smbus_write_byte(unsigned int smbus_base, unsigned int device,
- unsigned int address, unsigned int data);
-
#endif