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Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/gpio_defs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pmc.h10
-rw-r--r--src/soc/intel/skylake/include/soc/smbus.h9
3 files changed, 9 insertions, 11 deletions
diff --git a/src/soc/intel/skylake/include/soc/gpio_defs.h b/src/soc/intel/skylake/include/soc/gpio_defs.h
index 4008dfe31d..112db63e18 100644
--- a/src/soc/intel/skylake/include/soc/gpio_defs.h
+++ b/src/soc/intel/skylake/include/soc/gpio_defs.h
@@ -482,7 +482,6 @@
/* GPIOTXSTATE - Drive value onto pad */
#define GPIOTXSTATE_SHIFT 0
#define GPIOTXSTATE_MASK 0x1
-#define PAD_CFG_DW_OFFSET 0x400
/* TERM - termination control */
#define PAD_TERM_SHIFT 10
#define PAD_TERM_MASK 0xf
diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h
index 9c9b175285..10ea6ae894 100644
--- a/src/soc/intel/skylake/include/soc/pmc.h
+++ b/src/soc/intel/skylake/include/soc/pmc.h
@@ -99,14 +99,4 @@
#define GBLRST_CAUSE0 0x124
#define GBLRST_CAUSE1 0x128
-
-/* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
-#define TCO1_STS 0x04
-#define TCO2_STS 0x06
-#define TCO2_STS_SECOND_TO 0x02
-#define TCO2_STS_BOOT 0x04
-#define TCO1_CNT 0x08
-#define TCO_LOCK (1 << 12)
-#define TCO_TMR_HLT (1 << 11)
-
#endif
diff --git a/src/soc/intel/skylake/include/soc/smbus.h b/src/soc/intel/skylake/include/soc/smbus.h
index c395c8ed19..ff89f3ab28 100644
--- a/src/soc/intel/skylake/include/soc/smbus.h
+++ b/src/soc/intel/skylake/include/soc/smbus.h
@@ -27,6 +27,15 @@
/* SMBUS TCO base address. */
#define TCOBASE 0x50
+/* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
+#define TCO1_STS 0x04
+#define TCO2_STS 0x06
+#define TCO2_STS_SECOND_TO 0x02
+#define TCO2_STS_BOOT 0x04
+#define TCO1_CNT 0x08
+#define TCO_LOCK (1 << 12)
+#define TCO_TMR_HLT (1 << 11)
+
/* SMBus I/O bits. */
#define SMBHSTSTAT 0x0
#define SMBHSTCTL 0x2