diff options
Diffstat (limited to 'src/soc/intel/skylake/include/soc/device_nvs.h')
-rw-r--r-- | src/soc/intel/skylake/include/soc/device_nvs.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/device_nvs.h b/src/soc/intel/skylake/include/soc/device_nvs.h new file mode 100644 index 0000000000..7dab40da6a --- /dev/null +++ b/src/soc/intel/skylake/include/soc/device_nvs.h @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _BROADWELL_DEVICE_NVS_H_ +#define _BROADWELL_DEVICE_NVS_H_ + +#include <stdint.h> + +/* Offset in Global NVS where this structure lives */ +#define DEVICE_NVS_OFFSET 0x1000 + +#define SIO_NVS_DMA 0 +#define SIO_NVS_I2C0 1 +#define SIO_NVS_I2C1 2 +#define SIO_NVS_SPI0 3 +#define SIO_NVS_SPI1 4 +#define SIO_NVS_UART0 5 +#define SIO_NVS_UART1 6 +#define SIO_NVS_SDIO 7 +#define SIO_NVS_ADSP 8 + +typedef struct { + u8 enable[9]; + u32 bar0[9]; + u32 bar1[9]; +} __attribute__((packed)) device_nvs_t; + +#endif |