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path: root/src/soc/intel/skylake/chip_fsp20.c
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Diffstat (limited to 'src/soc/intel/skylake/chip_fsp20.c')
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index f4e17c640b..c9afeb40df 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -26,6 +26,7 @@
#include <fsp/util.h>
#include <intelblocks/chip.h>
#include <intelblocks/itss.h>
+#include <intelblocks/lpc_lib.h>
#include <intelblocks/xdci.h>
#include <intelpch/lockdown.h>
#include <romstage_handoff.h>
@@ -418,8 +419,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Indicate whether platform supports Voltage Margining */
params->PchPmSlpS0VmEnable = config->PchPmSlpS0VmEnable;
- params->PchSirqEnable = config->SerialIrqConfigSirqEnable;
- params->PchSirqMode = config->SerialIrqConfigSirqMode;
+ params->PchSirqEnable = config->serirq_mode != SERIRQ_OFF;
+ params->PchSirqMode = config->serirq_mode == SERIRQ_CONTINUOUS;
params->CpuConfig.Bits.SkipMpInit = !chip_get_fsp_mp_init();