diff options
Diffstat (limited to 'src/soc/intel/skylake/acpi')
-rw-r--r-- | src/soc/intel/skylake/acpi/globalnvs.asl | 5 | ||||
-rw-r--r-- | src/soc/intel/skylake/acpi/systemagent.asl | 27 |
2 files changed, 15 insertions, 17 deletions
diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl index c4544e8a6e..b2467f9918 100644 --- a/src/soc/intel/skylake/acpi/globalnvs.asl +++ b/src/soc/intel/skylake/acpi/globalnvs.asl @@ -3,7 +3,7 @@ * * Copyright (C) 2007-2009 coresystems GmbH * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2015-2020 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -70,6 +70,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve) EPCS, 8, // 0x43 - SGX Enabled status EMNA, 64, // 0x44 - 0x4B EPC base address ELNG, 64, // 0x4C - 0x53 EPC Length + E4GM, 8, // 0x54 - Enable above 4GB MMIO Resource + A4GB, 64, // 0x55 - 0x5C Base of above 4GB MMIO Resource + A4GS, 64, // 0x5D - 0x64 Length of above 4GB MMIO Resource /* IGD OpRegion */ Offset (0xb4), diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index 589fcc1518..89380aa194 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -3,7 +3,7 @@ * * Copyright (C) 2007-2009 coresystems GmbH * Copyright (C) 2015 Google Inc. - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2015-2020 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,9 +17,6 @@ #include <soc/iomap.h> -#define BASE_32GB 0x800000000 -#define SIZE_16GB 0x400000000 - Name (_HID, EISAID ("PNP0A08")) /* PCIe */ Name (_CID, EISAID ("PNP0A03")) /* PCI */ @@ -214,20 +211,18 @@ Method (_CRS, 0, Serialized) Add (Subtract (PMAX, PMIN), 1, PLEN) /* Patch PM02 range based on Memory Size */ - CreateQwordField (MCRS, PM02._MIN, MMIN) - CreateQwordField (MCRS, PM02._MAX, MMAX) - CreateQwordField (MCRS, PM02._LEN, MLEN) - - Store (\_SB.PCI0.MCHC.TUUD, Local0) - - If (LLessEqual (Local0, BASE_32GB)) { - Store (BASE_32GB, MMIN) - Store (SIZE_16GB, MLEN) + If (LEqual (A4GS, 0)) { + CreateQwordField (MCRS, PM02._LEN, MSEN) + Store (0, MSEN) } Else { - Store (0, MMIN) - Store (0, MLEN) + CreateQwordField (MCRS, PM02._MIN, MMIN) + CreateQwordField (MCRS, PM02._MAX, MMAX) + CreateQwordField (MCRS, PM02._LEN, MLEN) + /* Set 64bit MMIO resource base and length */ + Store (A4GS, MLEN) + Store (A4GB, MMIN) + Subtract (Add (MMIN, MLEN), 1, MMAX) } - Subtract (Add (MMIN, MLEN), 1, MMAX) Return (MCRS) } |