diff options
Diffstat (limited to 'src/soc/intel/meteorlake')
-rw-r--r-- | src/soc/intel/meteorlake/romstage/fsp_params.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 7921f228e4..89f6aaf191 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -28,6 +28,7 @@ static void pcie_rp_init(FSP_M_CONFIG *m_cfg, uint32_t en_mask, const struct pcie_rp_config *cfg, size_t cfg_count) { size_t i; + static unsigned int clk_req_mapping = 0; for (i = 0; i < cfg_count; i++) { if (!(en_mask & BIT(i))) @@ -37,8 +38,13 @@ static void pcie_rp_init(FSP_M_CONFIG *m_cfg, uint32_t en_mask, /* flags 0 means, RP config is not specify from devicetree */ if (cfg[i].flags == 0) continue; - if (!(cfg[i].flags & PCIE_RP_CLK_REQ_UNUSED)) + if (clk_req_mapping & (1 << cfg[i].clk_req)) + printk(BIOS_WARNING, "Found overlapped clkreq assignment on clk req %d\n" + , cfg[i].clk_req); + if (!(cfg[i].flags & PCIE_RP_CLK_REQ_UNUSED)) { m_cfg->PcieClkSrcClkReq[cfg[i].clk_src] = cfg[i].clk_req; + clk_req_mapping |= 1 << cfg[i].clk_req; + } m_cfg->PcieClkSrcUsage[cfg[i].clk_src] = i; } } |