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Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r--src/soc/intel/jasperlake/cpu.c41
-rw-r--r--src/soc/intel/jasperlake/include/soc/msr.h1
2 files changed, 1 insertions, 41 deletions
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index 1944e5c269..6f071c33f9 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -8,6 +8,7 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/turbo.h>
+#include <cpu/intel/common/common.h>
#include <fsp/api.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/mp_init.h>
@@ -80,29 +81,6 @@ static void configure_misc(void)
wrmsr(MSR_POWER_CTL, msr);
}
-static void enable_lapic_tpr(void)
-{
- msr_t msr;
-
- msr = rdmsr(MSR_PIC_MSG_CONTROL);
- msr.lo &= ~(1 << 10); /* Enable APIC TPR updates */
- wrmsr(MSR_PIC_MSG_CONTROL, msr);
-}
-
-static void configure_dca_cap(void)
-{
- uint32_t feature_flag;
- msr_t msr;
-
- /* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */
- feature_flag = cpu_get_feature_flags_ecx();
- if (feature_flag & CPUID_DCA) {
- msr = rdmsr(IA32_PLATFORM_DCA_CAP);
- msr.lo |= 1;
- wrmsr(IA32_PLATFORM_DCA_CAP, msr);
- }
-}
-
static void enable_pm_timer_emulation(void)
{
msr_t msr;
@@ -122,23 +100,6 @@ static void enable_pm_timer_emulation(void)
wrmsr(MSR_EMULATE_PM_TIMER, msr);
}
-static void set_energy_perf_bias(u8 policy)
-{
- msr_t msr;
- int ecx;
-
- /* Determine if energy efficient policy is supported. */
- ecx = cpuid_ecx(0x6);
- if (!(ecx & (1 << 3)))
- return;
-
- /* Energy Policy is bits 3:0 */
- msr = rdmsr(IA32_ENERGY_PERF_BIAS);
- msr.lo &= ~0xf;
- msr.lo |= policy & 0xf;
- wrmsr(IA32_ENERGY_PERF_BIAS, msr);
-}
-
/* All CPUs including BSP will run the following function. */
void soc_core_init(struct device *cpu)
{
diff --git a/src/soc/intel/jasperlake/include/soc/msr.h b/src/soc/intel/jasperlake/include/soc/msr.h
index 67e09dcf41..954fce0a82 100644
--- a/src/soc/intel/jasperlake/include/soc/msr.h
+++ b/src/soc/intel/jasperlake/include/soc/msr.h
@@ -5,7 +5,6 @@
#include <intelblocks/msr.h>
-#define MSR_PIC_MSG_CONTROL 0x2e
#define MSR_VR_MISC_CONFIG2 0x636
#endif