diff options
Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r-- | src/soc/intel/jasperlake/elog.c | 34 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/xhci.c | 4 |
2 files changed, 15 insertions, 23 deletions
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 5d3c69e3fe..cb9625a675 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -57,19 +57,6 @@ static void pch_log_rp_wake_source(void) } } -static void pch_log_add_elog_event(const struct pme_map *ipme_map) -{ - /* - * If wake source is XHCI, check for detailed wake source events on - * USB2/3 ports. - */ - if ((ipme_map->devfn == PCH_DEVFN_XHCI) && - pch_xhci_update_wake_event(soc_get_xhci_usb_info())) - return; - - elog_add_event_wake(ipme_map->wake_source, 0); -} - static void pch_log_pme_internal_wake_source(void) { size_t i; @@ -80,10 +67,12 @@ static void pch_log_pme_internal_wake_source(void) { PCH_DEVFN_GBE, ELOG_WAKE_SOURCE_PME_GBE }, { PCH_DEVFN_SATA, ELOG_WAKE_SOURCE_PME_SATA }, { PCH_DEVFN_CSE, ELOG_WAKE_SOURCE_PME_CSE }, - { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI }, { PCH_DEVFN_USBOTG, ELOG_WAKE_SOURCE_PME_XDCI }, { PCH_DEVFN_CNVI_WIFI, ELOG_WAKE_SOURCE_PME_WIFI }, }; + const struct xhci_wake_info xhci_wake_info[] = { + { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI }, + }; for (i = 0; i < ARRAY_SIZE(ipme_map); i++) { const struct device *dev = pcidev_path_on_root(ipme_map[i].devfn); @@ -91,20 +80,21 @@ static void pch_log_pme_internal_wake_source(void) continue; if (pci_dev_is_wake_source(dev)) { - pch_log_add_elog_event(&ipme_map[i]); + elog_add_event_wake(ipme_map[i].wake_source, 0); dev_found = true; } } /* - * If device is still not found, but the wake source is internal PME, - * try probing XHCI ports to see if any of the USB2/3 ports indicate - * that it was the wake source. This path would be taken in case of GSMI - * logging with S0ix where the pci_pm_resume_noirq runs and clears the - * PME_STS_BIT in controller register. + * Check the XHCI controllers' USB2 & USB3 ports for wake events. There + * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI + * controller's PME_STS_BIT may have already been cleared, so the host + * controller wake wouldn't get logged here; therefore, the host + * controller wake event is logged before its corresponding port wake + * event is logged. */ - if (!dev_found) - dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info()); + dev_found |= xhci_update_wake_event(xhci_wake_info, + ARRAY_SIZE(xhci_wake_info)); if (!dev_found) elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0); diff --git a/src/soc/intel/jasperlake/xhci.c b/src/soc/intel/jasperlake/xhci.c index 424751e9d8..eebacca9eb 100644 --- a/src/soc/intel/jasperlake/xhci.c +++ b/src/soc/intel/jasperlake/xhci.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <device/pci_type.h> #include <intelblocks/xhci.h> #define XHCI_USB2_PORT_STATUS_REG 0x480 @@ -14,7 +15,8 @@ static const struct xhci_usb_info usb_info = { .num_usb3_ports = XHCI_USB3_PORT_NUM, }; -const struct xhci_usb_info *soc_get_xhci_usb_info(void) +const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev) { + /* Jasper Lake only has one XHCI controller */ return &usb_info; } |