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-rw-r--r--src/soc/intel/jasperlake/chip.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3b813398a8..6e52efded3 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/gpio.h>
#include <intelblocks/gspi.h>
+#include <intelblocks/pcie_rp.h>
#include <intelblocks/power_limit.h>
#include <soc/gpe.h>
#include <soc/gpio.h>
@@ -114,12 +115,7 @@ struct soc_intel_jasperlake_config {
uint8_t PcieRpClkReqDetect[CONFIG_MAX_ROOT_PORTS];
/* PCIe RP L1 substate */
- enum L1_substates_control {
- L1_SS_FSP_DEFAULT,
- L1_SS_DISABLED,
- L1_SS_L1_1,
- L1_SS_L1_2,
- } PcieRpL1Substates[CONFIG_MAX_ROOT_PORTS];
+ enum L1_substates_control PcieRpL1Substates[CONFIG_MAX_ROOT_PORTS];
/* SMBus */
uint8_t SmbusEnable;