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-rw-r--r--src/soc/intel/jasperlake/romstage/pch.c2
-rw-r--r--src/soc/intel/jasperlake/romstage/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/romstage/pch.c b/src/soc/intel/jasperlake/romstage/pch.c
index 9fd8a1e43e..d3c2554425 100644
--- a/src/soc/intel/jasperlake/romstage/pch.c
+++ b/src/soc/intel/jasperlake/romstage/pch.c
@@ -3,7 +3,7 @@
#include <intelblocks/smbus.h>
#include <soc/romstage.h>
-void pch_init(void)
+void romstage_pch_init(void)
{
/* Program SMBUS_BASE_ADDRESS and Enable it */
smbus_common_init();
diff --git a/src/soc/intel/jasperlake/romstage/romstage.c b/src/soc/intel/jasperlake/romstage/romstage.c
index 54632383eb..db014ea5d6 100644
--- a/src/soc/intel/jasperlake/romstage/romstage.c
+++ b/src/soc/intel/jasperlake/romstage/romstage.c
@@ -131,7 +131,7 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
/* Program PCH init */
- pch_init();
+ romstage_pch_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);