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Diffstat (limited to 'src/soc/intel/jasperlake/romstage/pch.c')
-rw-r--r--src/soc/intel/jasperlake/romstage/pch.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/romstage/pch.c b/src/soc/intel/jasperlake/romstage/pch.c
new file mode 100644
index 0000000000..a005ea0b99
--- /dev/null
+++ b/src/soc/intel/jasperlake/romstage/pch.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <intelblocks/smbus.h>
+#include <intelblocks/tco.h>
+#include <soc/romstage.h>
+
+void pch_init(void)
+{
+ /* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
+ tco_configure();
+
+ /* Program SMBUS_BASE_ADDRESS and Enable it */
+ smbus_common_init();
+}