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Diffstat (limited to 'src/soc/intel/jasperlake/include/soc/p2sb.h')
-rw-r--r--src/soc/intel/jasperlake/include/soc/p2sb.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/soc/intel/jasperlake/include/soc/p2sb.h b/src/soc/intel/jasperlake/include/soc/p2sb.h
index d483ee399b..2fca70556c 100644
--- a/src/soc/intel/jasperlake/include/soc/p2sb.h
+++ b/src/soc/intel/jasperlake/include/soc/p2sb.h
@@ -12,14 +12,8 @@
* GNU General Public License for more details.
*/
-/*
- * This file is created based on Intel Tiger Lake Processor PCH Datasheet
- * Document number: 575857
- * Chapter number: 3
- */
-
-#ifndef _SOC_TIGERLAKE_P2SB_H_
-#define _SOC_TIGERLAKE_P2SB_H_
+#ifndef _SOC_JASPERLAKE_P2SB_H_
+#define _SOC_JASPERLAKE_P2SB_H_
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT (1 << 7)