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-rw-r--r--src/soc/intel/jasperlake/chip.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3e47e00a63..e6b8f6805e 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -419,6 +419,9 @@ struct soc_intel_jasperlake_config {
CD_CLOCK_556_8_MHZ = 7,
} cd_clock;
+ /* Platform Power Pmax */
+ uint16_t PsysPmax;
+
/*
* This is a workaround to mitigate higher SoC power consumption in S0ix
* when the CNVI has background activity.