aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/fsp_baytrail/romstage/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/fsp_baytrail/romstage/romstage.c')
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index ad42e73b2b..b0b8133803 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -43,7 +43,6 @@
#include <version.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
-#include <console/cbmem_console.h>
/* Return 0, 3, 4 or 5 to indicate the previous sleep state. */
uint32_t chipset_prev_sleep_state(uint32_t clear)