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Diffstat (limited to 'src/soc/intel/fsp_baytrail/baytrail/baytrail.h')
-rw-r--r--src/soc/intel/fsp_baytrail/baytrail/baytrail.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/baytrail/baytrail.h b/src/soc/intel/fsp_baytrail/baytrail/baytrail.h
index d3a23770dd..1982c278d1 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/baytrail.h
+++ b/src/soc/intel/fsp_baytrail/baytrail/baytrail.h
@@ -34,8 +34,11 @@
/* Southbridge internal device MEM BARs (Set to match FSP settings) */
#define DEFAULT_IBASE 0xfed08000
#define DEFAULT_PBASE 0xfed03000
+#ifndef __ACPI__
+#define DEFAULT_RCBA ((u8 *)0xfed1c000)
+#else
#define DEFAULT_RCBA 0xfed1c000
-
+#endif
/* Everything below this line is ignored in the DSDT */
#ifndef __ACPI__