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-rw-r--r--src/soc/intel/elkhartlake/chip.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index 5037147d74..26d0f0d666 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -149,8 +149,6 @@ struct soc_intel_elkhartlake_config {
/* HeciEnabled decides the state of Heci1 at end of boot
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
- /* Intel Speed Shift Technology */
- uint8_t speed_shift_enable;
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;