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-rw-r--r--src/soc/intel/elkhartlake/espi.c12
-rw-r--r--src/soc/intel/elkhartlake/include/soc/espi.h2
2 files changed, 0 insertions, 14 deletions
diff --git a/src/soc/intel/elkhartlake/espi.c b/src/soc/intel/elkhartlake/espi.c
index 6e6f887842..a531fccbb0 100644
--- a/src/soc/intel/elkhartlake/espi.c
+++ b/src/soc/intel/elkhartlake/espi.c
@@ -64,18 +64,6 @@ static void soc_mirror_dmi_pcr_io_dec(void)
soc_setup_dmi_pcr_io_dec(&io_dec_arr[0]);
}
-static void pch_misc_init(void)
-{
- uint8_t reg8;
-
- /* Setup NMI on errors, disable SERR */
- reg8 = (inb(NMI_STS_CNT) & 0xf0);
- outb((reg8 | (1 << 2)), NMI_STS_CNT);
-
- /* Disable NMI sources */
- outb((1 << 7), NMI_EN);
-};
-
void lpc_soc_init(struct device *dev)
{
/* Legacy initialization */
diff --git a/src/soc/intel/elkhartlake/include/soc/espi.h b/src/soc/intel/elkhartlake/include/soc/espi.h
index 6c2615816e..65ee732e9f 100644
--- a/src/soc/intel/elkhartlake/include/soc/espi.h
+++ b/src/soc/intel/elkhartlake/include/soc/espi.h
@@ -22,8 +22,6 @@
#define ESPI_GEN3_DEC 0x8c /* ESPI IF Generic Decode Range 3 */
#define ESPI_GEN4_DEC 0x90 /* ESPI IF Generic Decode Range 4 */
#define LGMR 0x98 /* ESPI Generic Memory Range */
-#define NMI_EN 0x70
-#define NMI_STS_CNT 0x61
#define PCCTL 0xE0 /* PCI Clock Control */
#define CLKRUN_EN (1 << 0)