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-rw-r--r--src/soc/intel/denverton_ns/Kconfig4
-rw-r--r--src/soc/intel/denverton_ns/acpi/northcluster.asl2
-rw-r--r--src/soc/intel/denverton_ns/bootblock/bootblock.c4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index a84cf1eebd..0643384e91 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -44,10 +44,10 @@ config CPU_SPECIFIC_OPTIONS
select FSP_T_XIP if FSP_CAR
select FSP_M_XIP
-config MMCONF_BASE_ADDRESS
+config ECAM_MMCONF_BASE_ADDRESS
default 0xe0000000
-config MMCONF_BUS_NUMBER
+config ECAM_MMCONF_BUS_NUMBER
int
default 256
diff --git a/src/soc/intel/denverton_ns/acpi/northcluster.asl b/src/soc/intel/denverton_ns/acpi/northcluster.asl
index 26a6f2ed95..e415dc4ea3 100644
--- a/src/soc/intel/denverton_ns/acpi/northcluster.asl
+++ b/src/soc/intel/denverton_ns/acpi/northcluster.asl
@@ -122,7 +122,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() {
// PCIEXBAR memory range
- Memory32Fixed(ReadOnly, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH)
+ Memory32Fixed(ReadOnly, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH)
// TSEG
Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, TSMB)
})
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index 1aebab4f83..cb2503ae40 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -74,8 +74,8 @@ static void sanity_check_pci_mmconf(void)
break;
}
- assert(base == CONFIG_MMCONF_BASE_ADDRESS);
- assert(length == CONFIG_MMCONF_BUS_NUMBER);
+ assert(base == CONFIG_ECAM_MMCONF_BASE_ADDRESS);
+ assert(length == CONFIG_ECAM_MMCONF_BUS_NUMBER);
}
void bootblock_soc_early_init(void)