diff options
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r-- | src/soc/intel/denverton_ns/acpi/cpu.asl | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/src/soc/intel/denverton_ns/acpi/cpu.asl b/src/soc/intel/denverton_ns/acpi/cpu.asl deleted file mode 100644 index 673df943ff..0000000000 --- a/src/soc/intel/denverton_ns/acpi/cpu.asl +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * Copyright (C) 2014 - 2017 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -/* These come from the dynamically created CPU SSDT */ -External (\_PR.CNOT, MethodObj) - -/* Notify OS to re-read CPU tables */ -Method (PNOT) -{ - \_PR.CNOT (0x81) -} - -/* Notify OS to re-read CPU _PPC limit */ -Method (PPCN) -{ - \_PR.CNOT (0x80) -} - -/* Notify OS to re-read Throttle Limit tables */ -Method (TNOT) -{ - \_PR.CNOT (0x82) -} |