diff options
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/acpi/lpc.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/exit_car_fsp.S | 10 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl index 262ac55cba..3167c183d8 100644 --- a/src/soc/intel/denverton_ns/acpi/lpc.asl +++ b/src/soc/intel/denverton_ns/acpi/lpc.asl @@ -177,7 +177,7 @@ Device (LPCB) Name(BUF0,ResourceTemplate() { IO(Decode16,0x02F8,0x02F8,0x01,0x08) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {17} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {17} }) Return(BUF0) } diff --git a/src/soc/intel/denverton_ns/exit_car_fsp.S b/src/soc/intel/denverton_ns/exit_car_fsp.S index 2ec625b4d2..83d5a330e7 100644 --- a/src/soc/intel/denverton_ns/exit_car_fsp.S +++ b/src/soc/intel/denverton_ns/exit_car_fsp.S @@ -29,11 +29,11 @@ * caching settings are based on an 8MiB Flash Size given as a * parameter to TempRamInit. * - * TempRamExit MTRR Settings: - * 0x00000000 - 0x0009FFFF | Write Back - * 0x000C0000 - Top of Low Memory | Write Back - * 0xFF800000 - 0xFFFFFFFF Flash Reg | Write Protect - * 0x100000000 - Top of High Memory | Write Back + * TempRamExit MTRR Settings: + * 0x00000000 - 0x0009FFFF | Write Back + * 0x000C0000 - Top of Low Memory | Write Back + * 0xFF800000 - 0xFFFFFFFF Flash Reg | Write Protect + * 0x100000000 - Top of High Memory | Write Back */ .text |