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Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/Kconfig26
1 files changed, 23 insertions, 3 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 89bbbb0c45..4981205f09 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -7,6 +7,10 @@ config SOC_INTEL_DENVERTON_NS
if SOC_INTEL_DENVERTON_NS
+config CPU_INTEL_NUM_FIT_ENTRIES
+ int
+ default 1
+
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_ALL_STAGES_X86_32
@@ -21,6 +25,7 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_MRC_SETTINGS
select PARALLEL_MP
select PCR_COMMON_IOSF_1_0
+ select SUPPORT_CPU_UCODE_IN_CBFS
select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CPU
@@ -134,6 +139,9 @@ config LEGACY_UART_MODE
bool "Legacy Mode"
help
Enable legacy UART mode
+ select CONSOLE_SERIAL
+ select DRIVERS_UART
+ select DRIVERS_UART_8250IO
endchoice
config ENABLE_HSUART
@@ -153,10 +161,14 @@ config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
-config DENVERTON_NS_CAR_NEM_ENHANCED
+choice
+ prompt "Cache-as-ram implementation"
+ default USE_DENVERTON_NS_CAR_NEM_ENHANCED
+ help
+ This option allows you to select how cache-as-ram (CAR) is set up.
+
+config USE_DENVERTON_NS_CAR_NEM_ENHANCED
bool "Enhanced Non-evict mode"
- depends on !FSP_CAR
- default y
select SOC_INTEL_COMMON_BLOCK_CAR
select USE_CAR_NEM_ENHANCED_V1
help
@@ -167,4 +179,12 @@ config DENVERTON_NS_CAR_NEM_ENHANCED
ENHANCED NEM guarantees that modified data is always
kept in cache while clean data is replaced.
+config USE_DENVERTON_NS_FSP_CAR
+ bool "Use FSP CAR"
+ select FSP_CAR
+ help
+ Use FSP APIs to initialize and tear down the Cache-As-Ram.
+
+endchoice
+
endif ## SOC_INTEL_DENVERTON_NS