3 files changed, 75 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index a045bbea58..3827cf511a 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -133,6 +133,12 @@ void pmc_clear_all_gpe_status(void);
 void pmc_clear_prsts(void);
 
 /*
+ * Set PMC register to know which state system should be after
+ * power reapplied
+ */
+void pmc_soc_restore_power_failure(void);
+
+/*
  * Enable or disable global reset. If global reset is enabled, hard reset and
  * soft reset will trigger global reset, where both host and TXE are reset.
  * This is cleared on cold boot, hard reset, soft reset and Sx.
@@ -205,4 +211,22 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2);
  */
 void soc_fill_power_state(struct chipset_power_state *ps);
 
+/*
+ * Which state do we want to goto after g3 (power restored)?
+ * 0 == S5 Soft Off
+ * 1 == S0 Full On
+ * 2 == Keep Previous State
+ */
+enum {
+	MAINBOARD_POWER_STATE_OFF,
+	MAINBOARD_POWER_STATE_ON,
+	MAINBOARD_POWER_STATE_PREVIOUS,
+};
+
+/*
+ * Determines what state to go to when power is reapplied
+ * after a power failure (G3 State)
+ */
+int pmc_get_mainboard_power_failure_state_choice(void);
+
 #endif /* SOC_INTEL_COMMON_BLOCK_PMCLIB_H */
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig
index c00e14c303..cfd12d8f3e 100644
--- a/src/soc/intel/common/block/pmc/Kconfig
+++ b/src/soc/intel/common/block/pmc/Kconfig
@@ -5,3 +5,28 @@ config SOC_INTEL_COMMON_BLOCK_PMC
 	help
 	  Intel Processor common code for Power Management controller(PMC)
 	  subsystem
+
+choice
+	prompt "System Power State after Failure"
+	default POWER_STATE_ON_AFTER_FAILURE
+
+config POWER_STATE_OFF_AFTER_FAILURE
+	bool "S5 Soft Off"
+	help
+	  Choose this option if you want to keep system into
+	  S5 after reapplying power after failure
+
+config POWER_STATE_ON_AFTER_FAILURE
+	bool "S0 Full On"
+	help
+	  Choose this option if you want to keep system into
+	  S0 after reapplying power after failure
+
+config POWER_STATE_PREVIOUS_AFTER_FAILURE
+	bool "Keep Previous State"
+	help
+	  Choose this option if you want to keep system into
+	  same power state as before failure even after reapplying
+	  power
+
+endchoice
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index f653bf08a1..dea7e1bc18 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -80,6 +80,18 @@ __attribute__ ((weak)) uint32_t soc_get_smi_status(uint32_t generic_sts)
 	return generic_sts;
 }
 
+/*
+ * Set PMC register to know which state system should be after
+ * power reapplied
+ */
+__attribute__ ((weak)) void pmc_soc_restore_power_failure(void)
+{
+	/*
+	 * SoC code should set PMC config register in order to set
+	 * MAINBOARD_POWER_ON bit as per EDS.
+	 */
+}
+
 static uint32_t pmc_reset_smi_status(void)
 {
 	uint32_t smi_sts = inl(ACPI_BASE_ADDRESS + SMI_STS);
@@ -590,3 +602,17 @@ void pmc_gpe_init(void)
 	/* Set the routes in the GPIO communities as well. */
 	gpio_route_gpe(dw0, dw1, dw2);
 }
+
+/*
+ * Determines what state to go to when power is reapplied
+ * after a power failure (G3 State)
+ */
+int pmc_get_mainboard_power_failure_state_choice(void)
+{
+	if (IS_ENABLED(CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE))
+		return MAINBOARD_POWER_STATE_PREVIOUS;
+	else if (IS_ENABLED(CONFIG_POWER_STATE_ON_AFTER_FAILURE))
+		return MAINBOARD_POWER_STATE_ON;
+
+	return MAINBOARD_POWER_STATE_OFF;
+}