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Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c59
1 files changed, 31 insertions, 28 deletions
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index e7230bcbf4..3da837c0af 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -41,34 +41,6 @@ __weak unsigned long sa_write_acpi_tables(const struct device *dev,
}
/*
- * This function will get above 4GB mmio enable config specific to soc.
- *
- * Return values:
- * 0 = Above 4GB memory is not enable
- * 1 = Above 4GB memory is enable
- */
-static int get_enable_above_4GB_mmio(void)
-{
- const struct soc_intel_common_config *common_config;
- common_config = chip_get_common_soc_structure();
-
- return common_config->enable_above_4GB_mmio;
-}
-
-/* Fill MMIO resource above 4GB into GNVS */
-void sa_fill_gnvs(global_nvs_t *gnvs)
-{
- if (get_enable_above_4GB_mmio()) {
- gnvs->e4gm = 1;
- gnvs->a4gb = ABOVE_4GB_MEM_BASE_ADDRESS;
- gnvs->a4gs = ABOVE_4GB_MEM_BASE_SIZE;
- printk(BIOS_DEBUG,
- "PCI space above 4GB MMIO is from 0x%llx to len = 0x%llx\n",
- gnvs->a4gb, gnvs->a4gs);
- }
-}
-
-/*
* Add all known fixed MMIO ranges that hang off the host bridge/memory
* controller device.
*/
@@ -124,6 +96,37 @@ static void sa_read_map_entry(struct device *dev,
*result = value;
}
+/*
+ * This function will get above 4GB mmio enable config specific to soc.
+ *
+ * Return values:
+ * 0 = Above 4GB memory is not enable
+ * 1 = Above 4GB memory is enable
+ */
+static int get_enable_above_4GB_mmio(void)
+{
+ const struct soc_intel_common_config *common_config;
+ common_config = chip_get_common_soc_structure();
+
+ return common_config->enable_above_4GB_mmio;
+}
+
+/* Fill MMIO resource above 4GB into GNVS */
+void sa_fill_gnvs(global_nvs_t *gnvs)
+{
+ if (!get_enable_above_4GB_mmio())
+ return;
+
+ struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
+
+ gnvs->e4gm = 1;
+ sa_read_map_entry(sa_dev, &sa_memory_map[SA_TOUUD_REG], &gnvs->a4gb);
+ gnvs->a4gs = ABOVE_4GB_MEM_BASE_SIZE;
+ printk(BIOS_DEBUG, "PCI space above 4GB MMIO is from 0x%llx to len = 0x%llx\n",
+ gnvs->a4gb, gnvs->a4gs);
+}
+
+
static void sa_get_mem_map(struct device *dev, uint64_t *values)
{
int i;