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-rw-r--r--src/soc/intel/common/block/include/intelblocks/pcie_rp.h6
-rw-r--r--src/soc/intel/common/block/pcie/pcie_rp.c17
2 files changed, 17 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
index b43987d13c..2f3b83ce4c 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
@@ -62,11 +62,17 @@ struct pcie_rp_config {
* in case the root port numbers are not contiguous within the slot.
* `count` is the number of functions within the group starting with the `start`
* function number.
+ * `lcap_port_base` is the starting index of physical port as described in LCAP
+ * register in PCIe config space. coreboot always uses 0 based indexing while
+ * referring to the PCIe port but LCAP registers uses 1-based indexing in
+ * most of the cases. Remapping logic needs to correctly map LCAP port number
+ * (1-based or n-based) to coreboot indexing (0-based).
*/
struct pcie_rp_group {
unsigned int slot;
unsigned int start;
unsigned int count;
+ unsigned int lcap_port_base;
};
static inline unsigned int rp_start_fn(const struct pcie_rp_group *group)
diff --git a/src/soc/intel/common/block/pcie/pcie_rp.c b/src/soc/intel/common/block/pcie/pcie_rp.c
index 221ee03a94..145159f6eb 100644
--- a/src/soc/intel/common/block/pcie/pcie_rp.c
+++ b/src/soc/intel/common/block/pcie/pcie_rp.c
@@ -31,20 +31,25 @@ static int pcie_rp_original_idx(
}
const uint32_t lcap = pci_s_read_config32(dev, clist + PCI_EXP_LNKCAP);
- /* Read 1-based absolute port number. This reflects the numbering
- scheme that Intel uses in their documentation and what we use
- as index (0-based, though) in our mapping. */
+
+ /* Read n-based absolute port number from LCAP register.
+ This reflects the numbering scheme that Intel uses in their
+ documentation and what we use as index (0-based, though) in
+ our mapping. */
const unsigned int port_num = (lcap & PCI_EXP_LNKCAP_PORT) >> 24;
- /* `port_num` is 1-based, `offset` is 0-based. */
- if (port_num <= offset || port_num > offset + group->count) {
+ /* Subtract lcap_port_base from port_num to get 0-based index */
+ const unsigned int port_idx = port_num - group->lcap_port_base;
+
+ /* Check if port_idx (0-based) is out of bounds */
+ if (port_idx < offset || port_idx >= offset + group->count) {
printk(BIOS_WARNING, "%s: Unexpected root-port number '%u'"
" at PCI: 00:%02x.%x, ignoring.\n",
__func__, port_num, group->slot, PCI_FUNC(PCI_DEV2DEVFN(dev)));
return -1;
}
- return port_num - 1;
+ return port_idx;
}
/* Scan actual PCI config space to reconstruct current mapping */