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Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/Kconfig12
-rw-r--r--src/soc/intel/common/raminit.c5
2 files changed, 0 insertions, 17 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 3d0c0eff78..68d3f5ea6c 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -36,18 +36,6 @@ endif # CACHE_MRC_SETTINGS
endif # HAVE_MRC
-config CHIPSET_RESERVED_MEM_BYTES
- hex "Size in bytes of chipset reserved memory area"
- default 0
- help
- If insufficient documentation is available to determine the size of
- the chipset reserved memory area by walking the chipset registers,
- the CHIPSET_RESERVED_MEM_BYTES may be used as a workaround to account
- for the missing pieces of memory. The value specified in bytes is:
-
- value = TSEG base - top of low usable memory - (any sizes determined
- by reading chipset registers)
-
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n
diff --git a/src/soc/intel/common/raminit.c b/src/soc/intel/common/raminit.c
index 0e764cd18b..69ae1146a4 100644
--- a/src/soc/intel/common/raminit.c
+++ b/src/soc/intel/common/raminit.c
@@ -153,8 +153,6 @@ void raminit(struct romstage_params *params)
#endif
/* Migrate CAR data */
- printk(BIOS_DEBUG, "0x%08x: CONFIG_CHIPSET_RESERVED_MEM_BYTES\n",
- CONFIG_CHIPSET_RESERVED_MEM_BYTES);
printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
if (pei_ptr->boot_mode != SLEEP_STATE_S3) {
cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
@@ -268,9 +266,6 @@ void raminit(struct romstage_params *params)
- cbmem_root->PhysicalStart
- cbmem_root->ResourceLength;
printk(BIOS_DEBUG,
- "0x%08x: CONFIG_CHIPSET_RESERVED_MEM_BYTES\n",
- CONFIG_CHIPSET_RESERVED_MEM_BYTES);
- printk(BIOS_DEBUG,
"0x%08x: Chipset reserved bytes reported by FSP\n",
(unsigned int)delta_bytes);
die("Please verify the chipset reserved size\n");