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Diffstat (limited to 'src/soc/intel/common/pch')
-rw-r--r--src/soc/intel/common/pch/lockdown/lockdown.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c
index 42f01bf6d3..f8eb511889 100644
--- a/src/soc/intel/common/pch/lockdown/lockdown.c
+++ b/src/soc/intel/common/pch/lockdown/lockdown.c
@@ -30,7 +30,7 @@ int get_lockdown_config(void)
static void gpmr_lockdown_cfg(void)
{
/*
- * GCS reg of DMI
+ * GCS reg
*
* When set, prevents GCS.BBS from being changed
* GCS.BBS: (Boot BIOS Strap) This field determines the destination
@@ -43,9 +43,10 @@ static void gpmr_lockdown_cfg(void)
/*
* Set Secure Register Lock (SRL) bit in DMI control register to lock
- * DMI configuration.
+ * DMI configuration and bypass when IOC instead of DMI
*/
- gpmr_or32(GPMR_DMICTL, GPMR_DMICTL_SRLOCK);
+ if (!CONFIG(SOC_INTEL_COMMON_BLOCK_IOC))
+ gpmr_or32(GPMR_DMICTL, GPMR_DMICTL_SRLOCK);
}
static void fast_spi_lockdown_cfg(int chipset_lockdown)