2 files changed, 15 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index 9dbac24f8c..89c3cdcd5d 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -149,7 +149,9 @@ struct chipset_power_state *pmc_get_power_state(void);
 
 /*
  * Reads and prints ACPI specific PM registers which are common across
- * chipsets. Returns the previous sleep state which is one of ACPI_SX values.
+ * chipsets. Returns the previous sleep state which is one of ACPI_SX
+ * values. Additionally, it also disables all GPEs after GPE_EN
+ * registers are read.
  */
 int pmc_fill_power_state(struct chipset_power_state *ps);
 
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index b8ec17dd58..7bddb4700c 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -410,6 +410,18 @@ int pmc_fill_power_state(struct chipset_power_state *ps)
 	ps->prev_sleep_state = pmc_prev_sleep_state(ps);
 	printk(BIOS_DEBUG, "prev_sleep_state %d\n", ps->prev_sleep_state);
 
+	/*
+	 * GPEs need to be disabled before enabling SMI. Otherwise, it could
+	 * lead to SMIs being triggered in coreboot preventing the progress of
+	 * normal boot-up. However, GPEs should not be disabled as part of
+	 * pmc_gpe_init which happens in bootblock. Otherwise,
+	 * pmc_fill_power_state would read GPE0_EN registers as all 0s thus
+	 * losing information about the wake source. Hence,
+	 * pmc_disable_all_gpe() is placed here after GPE0_EN registers are
+	 * saved in chipset_power_state.
+	 */
+	pmc_disable_all_gpe();
+
 	return ps->prev_sleep_state;
 }
 
@@ -558,6 +570,4 @@ void pmc_gpe_init(void)
 
 	/* Set the routes in the GPIO communities as well. */
 	gpio_route_gpe(dw0, dw1, dw2);
-
-	pmc_disable_all_gpe();
 }