diff options
Diffstat (limited to 'src/soc/intel/common/block/smm')
| -rw-r--r-- | src/soc/intel/common/block/smm/smihandler.c | 7 | ||||
| -rw-r--r-- | src/soc/intel/common/block/smm/smm.c | 4 |
2 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 3f1f490861..7821dbaddc 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -151,7 +151,7 @@ void smihandler_southbridge_sleep( elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ); /* Clear pending GPE events */ - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); /* Next, do the deed. */ @@ -183,9 +183,6 @@ void smihandler_southbridge_sleep( break; } - /* Clear the gpio gpe0 status bits in ACPI registers */ - pmc_clear_gpi_gpe_sts(); - /* Tri-state specific GPIOS to avoid leakage during S3/S5 */ /* @@ -328,7 +325,7 @@ void smihandler_southbridge_pm1( void smihandler_southbridge_gpe0( const struct smm_save_state_ops *save_state_ops) { - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void smihandler_southbridge_tco( diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 8428fca2c7..d5f42a76e6 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -35,7 +35,7 @@ void smm_southbridge_clear_state(void) pmc_clear_smi_status(); pmc_clear_pm1_status(); pmc_clear_tco_status(); - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void smm_southbridge_enable(void) @@ -43,7 +43,7 @@ void smm_southbridge_enable(void) printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ pmc_enable_pm1(PWRBTN_EN | GBL_EN); - pmc_disable_gpe(PME_B0_EN); + pmc_disable_std_gpe(PME_B0_EN); /* * Enable SMI generation: |