diff options
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/msr.h | 10 |
2 files changed, 0 insertions, 15 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 0c7f2c42d3..34caf4c252 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -159,9 +159,4 @@ uint32_t cpu_get_max_turbo_ratio(void); /* Configure Machine Check Architecture support */ void mca_configure(void); -/* Set/Clear NXE bit in IA32_EFER MSR */ -void set_nxe(uint8_t enable); - -/* Set PAT MSR */ -void set_pat(uint64_t pat); #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 5cfce17894..22e8862e98 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -72,7 +72,6 @@ #define PRMRR_PHYS_MASK_LOCK (1 << 10) #define PRMRR_PHYS_MASK_VALID (1 << 11) #define MSR_POWER_CTL 0x1fc -#define MSR_IA32_PAT 0x277 #define MSR_EVICT_CTL 0x2e0 #define MSR_SGX_OWNEREPOCH0 0x300 #define MSR_SGX_OWNEREPOCH1 0x301 @@ -143,13 +142,4 @@ #define SGX_RESOURCE_MASK_LO (0xfffff000UL) #define SGX_RESOURCE_MASK_HI (0xfffffUL) -/* Intel SDM: Table 2-1 - * IA-32 architectural MSR: Extended Feature Enable Register - */ -#define IA32_EFER 0xC0000080 -#define EFER_NXE (1 << 11) -#define EFER_LMA (1 << 10) -#define EFER_LME (1 << 8) -#define EFER_SCE (1 << 0) - #endif /* SOC_INTEL_COMMON_MSR_H */ |