diff options
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/chip.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/mmc.h (renamed from src/soc/intel/common/block/include/intelblocks/early_mmc.h) | 31 |
2 files changed, 24 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/chip.h b/src/soc/intel/common/block/include/intelblocks/chip.h index 9fe165e5b1..1e830d5d17 100644 --- a/src/soc/intel/common/block/include/intelblocks/chip.h +++ b/src/soc/intel/common/block/include/intelblocks/chip.h @@ -18,6 +18,7 @@ #include <intelblocks/gspi.h> #include <drivers/i2c/designware/dw_i2c.h> +#include <intelblocks/mmc.h> enum { CHIPSET_LOCKDOWN_FSP = 0, /* FSP handles locking per UPDs */ @@ -35,6 +36,7 @@ struct soc_intel_common_config { struct dw_i2c_bus_config i2c[CONFIG_SOC_INTEL_I2C_DEV_MAX]; /* PCH Thermal Trip Temperature in deg C */ uint8_t pch_thermal_trip; + struct mmc_dll_params emmc_dll; }; /* This function to retrieve soc config structure required by common code */ diff --git a/src/soc/intel/common/block/include/intelblocks/early_mmc.h b/src/soc/intel/common/block/include/intelblocks/mmc.h index 39aaf58fcf..a8776ea842 100644 --- a/src/soc/intel/common/block/include/intelblocks/early_mmc.h +++ b/src/soc/intel/common/block/include/intelblocks/mmc.h @@ -13,18 +13,12 @@ * GNU General Public License for more details. */ -#ifndef SOC_INTEL_COMMON_BLOCK_EARLY_MMC_H -#define SOC_INTEL_COMMON_BLOCK_EARLY_MMC_H +#ifndef SOC_INTEL_COMMON_BLOCK_MMC_H +#define SOC_INTEL_COMMON_BLOCK_MMC_H #include <stdint.h> /* - * Following should be defined in soc/iomap.h - * PRERAM_MMC_BASE_ADDRESS - Provide an address to setup emmc controller's - PCI BAR. - */ - -/* * Structure for the following delay registers * emmc_tx_data_cntl1: Tx Delay Control 1 (Tx_DATA_dly_1)-Offset 824h * emmc_tx_data_cntl2: Tx Delay Control 2 (Tx_DATA_dly_2)-Offset 828h @@ -60,9 +54,28 @@ int soc_configure_mmc_gpios(void); * returns 0, if able to get register settings; otherwise returns -1 */ int soc_get_mmc_dll(struct mmc_dll_params *params); +/* + * Set mmc delay register settings. + * bar: eMMC controller MMIO base address. + * returns 0, if able to set register settings; otherwise returns -1 + */ +int set_mmc_dll(void *bar); + +#define EMMC_TX_CMD_CNTL_OFFSET 0x820 +#define EMMC_TX_DATA_CNTL1_OFFSET 0x824 +#define EMMC_TX_DATA_CNTL2_OFFSET 0x828 +#define EMMC_RX_CMD_DATA_CNTL1_OFFSET 0x82C +#define EMMC_RX_STROBE_CNTL_OFFSET 0x830 +#define EMMC_RX_CMD_DATA_CNTL2_OFFSET 0x834 #if CONFIG(SOC_INTEL_COMMON_EARLY_MMC_WAKE) /* + * Following should be defined in soc/iomap.h + * PRERAM_MMC_BASE_ADDRESS - Provide an address to setup emmc controller's + PCI BAR. + */ + +/* * Initializes sdhci / mmc controller and sends CMD0, CMD1 to emmc card. * In case of success: It returns 0 and adds cbmem entry CBMEM_ID_MMC_STATUS * and sets it to 1. Payload can start by sending CMD1, there is no need to @@ -77,4 +90,4 @@ static inline int early_mmc_wake_hw(void) return -1; } #endif /* CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE */ -#endif /* SOC_INTEL_COMMON_BLOCK_EARLY_MMC_H */ +#endif /* SOC_INTEL_COMMON_BLOCK_MMC_H */ |