diff options
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
5 files changed, 8 insertions, 25 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index 19dd68af6c..21664c8716 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -12,7 +12,7 @@ struct chipset_power_state; /* Forward declare the global nvs structure here */ -struct global_nvs_t; +struct global_nvs; /* Return ACPI name for this device */ const char *soc_acpi_name(const struct device *dev); @@ -32,19 +32,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device, struct acpi_rsdp *rsdp); /* - * Creates acpi gnvs and adds it to the DSDT table. - * GNVS creation is chipset specific and is done in soc specific acpi.c file. - */ -void southbridge_inject_dsdt(const struct device *device); - -/* - * This function populates the gnvs structure in acpi table. - * Defined as weak in common acpi as gnvs structure definition is - * chipset specific. - */ -void acpi_create_gnvs(struct global_nvs_t *gnvs); - -/* * get_cstate_map returns a table of processor specific acpi_cstate_t entries * and number of entries in the table */ diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index e1040eac3c..cc240c5760 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -6,7 +6,7 @@ #include <commonlib/helpers.h> #include <vendorcode/google/chromeos/gnvs.h> -typedef struct global_nvs_t { +struct __packed global_nvs { /* Miscellaneous */ u16 osys; /* 0x00 - 0x01 Operating System */ u8 smif; /* 0x02 - SMI function call ("TRAP") */ @@ -31,7 +31,8 @@ typedef struct global_nvs_t { /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos; -} __packed global_nvs_t; -check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); +}; + +check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); #endif diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h index e6c99057c2..56e4a167b5 100644 --- a/src/soc/intel/common/block/include/intelblocks/sgx.h +++ b/src/soc/intel/common/block/include/intelblocks/sgx.h @@ -18,6 +18,6 @@ void prmrr_core_configure(void); void sgx_configure(void *unused); /* Fill GNVS data with SGX status, EPC base and length */ -void sgx_fill_gnvs(global_nvs_t *gnvs); +void sgx_fill_gnvs(struct global_nvs *gnvs); #endif /* SOC_INTEL_COMMON_BLOCK_SGX_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h index 428a9f35b1..7cea1dd1ab 100644 --- a/src/soc/intel/common/block/include/intelblocks/smihandler.h +++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h @@ -7,7 +7,7 @@ #include <stdint.h> struct gpi_status; -struct global_nvs_t; +struct global_nvs; /* * The register value is used with get_reg and set_reg @@ -127,11 +127,6 @@ void smihandler_southbridge_gpi( void smihandler_southbridge_espi( const struct smm_save_state_ops *save_state_ops); -/* - * Returns gnvs pointer within SMM context - */ -struct global_nvs_t *smm_get_gnvs(void); - /* SoC overrides. */ /* Specific SOC SMI handler during ramstage finalize phase */ diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h index ae7211697e..cf5613853e 100644 --- a/src/soc/intel/common/block/include/intelblocks/systemagent.h +++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h @@ -71,7 +71,7 @@ uintptr_t sa_get_tseg_base(void); /* API to get TSEG size */ size_t sa_get_tseg_size(void); /* Fill MMIO resource above 4GB into GNVS */ -void sa_fill_gnvs(global_nvs_t *gnvs); +void sa_fill_gnvs(struct global_nvs *gnvs); /* * SoC overrides * |