diff options
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/lpss.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpss.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h new file mode 100644 index 0000000000..03a47144c8 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/lpss.h @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_BLOCK_LPSS_H +#define SOC_INTEL_COMMON_BLOCK_LPSS_H + +#include <stdint.h> + +/* Gets controller out of reset */ +void lpss_reset_release(uintptr_t base); + +/* + * Update clock divider parameters. Clock frequency is + * configured as SOC_INTEL_COMMON_LPSS_CLOCK_MHZ * (M / N) + */ +void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val); + +#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */ |