aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/common/block/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/common/block/cpu')
-rw-r--r--src/soc/intel/common/block/cpu/Kconfig15
-rw-r--r--src/soc/intel/common/block/cpu/car/cache_as_ram.S12
2 files changed, 2 insertions, 25 deletions
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig
index 1ec7af5cd4..912760e217 100644
--- a/src/soc/intel/common/block/cpu/Kconfig
+++ b/src/soc/intel/common/block/cpu/Kconfig
@@ -51,21 +51,6 @@ config INTEL_CAR_NEM_ENHANCED
ENHANCED NEM guarantees that modified data is always
kept in cache while clean data is replaced.
-config USE_CAR_NEM_ENHANCED_V1
- bool
- select INTEL_CAR_NEM_ENHANCED
- help
- This config supports INTEL_CAR_NEM_ENHANCED mode on
- SKL, KBL, CNL, WHL, CML and ICL and JSL platforms.
-
-config USE_CAR_NEM_ENHANCED_V2
- bool
- select INTEL_CAR_NEM_ENHANCED
- select COS_MAPPED_TO_MSB
- help
- This config supports INTEL_CAR_NEM_ENHANCED mode on
- TGL platform.
-
config COS_MAPPED_TO_MSB
bool
depends on INTEL_CAR_NEM_ENHANCED
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index 97bffb0062..b60e797b2f 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -415,7 +415,7 @@ set_eviction_mask:
mov %ebx, %ecx /* back up the number of ways */
mov %eax, %ebx /* back up the non-eviction mask */
/*
- * Set MSR 0xC91 IA32_L3_MASK_1 or MSR 0x1891 IA32_CR_SF_QOS_MASK_1
+ * Program MSR 0xC91 IA32_L3_MASK_1
* This MSR contain one bit per each way of LLC
* - If this bit is '0' - the way is protected from eviction
* - If this bit is '1' - the way is not protected from eviction
@@ -428,26 +428,18 @@ set_eviction_mask:
xor $~0, %eax /* invert 32 bits */
and %ecx, %eax
-#if CONFIG(USE_CAR_NEM_ENHANCED_V1)
movl $IA32_L3_MASK_1, %ecx
-#elif CONFIG(USE_CAR_NEM_ENHANCED_V2)
- movl $IA32_CR_SF_QOS_MASK_1, %ecx
-#endif
xorl %edx, %edx
wrmsr
/*
- * Set MSR 0xC92 IA32_L3_MASK_1 or MSR 0x1892 IA32_CR_SF_QOS_MASK_2
+ * Program MSR 0xC92 IA32_L3_MASK_2
* This MSR contain one bit per each way of LLC
* - If this bit is '0' - the way is protected from eviction
* - If this bit is '1' - the way is not protected from eviction
*/
mov %ebx, %eax
-#if CONFIG(USE_CAR_NEM_ENHANCED_V1)
movl $IA32_L3_MASK_2, %ecx
-#elif CONFIG(USE_CAR_NEM_ENHANCED_V2)
- movl $IA32_CR_SF_QOS_MASK_2, %ecx
-#endif
xorl %edx, %edx
wrmsr
/*