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-rw-r--r--src/soc/intel/cannonlake/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index fe34d05060..96018637c1 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -185,7 +185,7 @@ static void enable_pm_timer_emulation(void)
/* Set PM1 timer IO port and enable*/
msr.lo = (EMULATE_DELAY_VALUE << EMULATE_DELAY_OFFSET_VALUE) |
EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + PM1_TMR);
- wrmsr(MSR_EMULATE_PM_TMR, msr);
+ wrmsr(MSR_EMULATE_PM_TIMER, msr);
}
/* All CPUs including BSP will run the following function. */