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-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/finalize.c13
-rw-r--r--src/soc/intel/cannonlake/include/soc/pmc.h1
3 files changed, 6 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index b0335cf379..9bd9f43314 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -96,6 +96,7 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_0
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
+ select PMC_LOW_POWER_MODE_PROGRAM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index 315c67a9d3..9eb9cbea8c 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -9,6 +9,7 @@
#include <device/pci.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
+#include <intelblocks/pmclib.h>
#include <intelblocks/tco.h>
#include <intelblocks/thermal.h>
#include <spi-generic.h>
@@ -44,7 +45,6 @@ static void pch_finalize(void)
uint32_t reg32;
uint8_t *pmcbase;
config_t *config;
- uint8_t reg8;
tco_lockdown();
@@ -70,17 +70,12 @@ static void pch_finalize(void)
*/
config = config_of_soc();
pmcbase = pmc_mmio_regs();
- if (config->PmTimerDisabled) {
- reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
- reg8 |= (1 << 1);
- write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
- }
+ if (config->PmTimerDisabled)
+ pmc_disable_acpi_timer();
if (config->s0ix_enable) {
/* Disable XTAL shutdown qualification for low power idle. */
- reg32 = read32(pmcbase + CPPMVRIC);
- reg32 |= XTALSDQDIS;
- write32(pmcbase + CPPMVRIC, reg32);
+ pmc_ignore_xtal_shutdown();
if (config->cppmvric2_adsposcdis) {
/* Enable Audio DSP OSC qualification for S0ix */
diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 2c2db0301f..3576d80969 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -98,6 +98,7 @@
#define PCH2CPU_TT_EN (1 << 26)
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
+#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4*(x))