diff options
Diffstat (limited to 'src/soc/intel/cannonlake/uart.c')
| -rw-r--r-- | src/soc/intel/cannonlake/uart.c | 53 |
1 files changed, 47 insertions, 6 deletions
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c index 66883ec7e3..21b64178dd 100644 --- a/src/soc/intel/cannonlake/uart.c +++ b/src/soc/intel/cannonlake/uart.c @@ -16,16 +16,19 @@ #define __SIMPLE_DEVICE__ #include <assert.h> +#include <cbmem.h> #include <console/uart.h> +#include <device/pci.h> #include <device/pci_def.h> #include <intelblocks/gpio.h> #include <intelblocks/lpss.h> #include <intelblocks/pcr.h> #include <intelblocks/uart.h> +#include <soc/iomap.h> +#include <soc/nvs.h> #include <soc/pch.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -#include <soc/iomap.h> /* Serial IO UART controller legacy mode */ #define PCR_SERIAL_IO_GPPRVRW7 0x618 @@ -49,6 +52,14 @@ static const struct port { } }; +#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM) +uintptr_t uart_platform_base(int idx) +{ + /* We can only have one serial console at a time */ + return UART_BASE_0_ADDR(idx); +} +#endif + void pch_uart_init(void) { uintptr_t base; @@ -75,10 +86,40 @@ void pch_uart_init(void) gpio_configure_pads(p->pads, ARRAY_SIZE(p->pads)); } -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM) -uintptr_t uart_platform_base(int idx) +device_t pch_uart_get_debug_controller(void) { - /* We can only have one serial console at a time */ - return UART_BASE_0_ADDR(idx); + switch (CONFIG_UART_FOR_CONSOLE) { + case 0: + return PCH_DEV_UART0; + case 1: + return PCH_DEV_UART1; + case 2: + default: + return PCH_DEV_UART2; + } +} + +void pch_uart_read_resources(struct device *dev) +{ + pci_dev_read_resources(dev); + + /* Set the configured UART base address for the debug port */ + if (IS_ENABLED(CONFIG_UART_DEBUG) && uart_is_debug_controller(dev)) { + struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); + /* Need to set the base and size for the resource allocator. */ + res->base = UART_BASE_0_ADDR(CONFIG_UART_FOR_CONSOLE); + res->size = UART_DEBUG_BASE_0_SIZE; + res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | + IORESOURCE_FIXED; + } +} + +bool pch_uart_init_debug_controller_on_resume(void) +{ + global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + + if (gnvs) + return !!gnvs->uior; + + return false; } -#endif |