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path: root/src/soc/intel/cannonlake/romstage/romstage.c
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-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 17c31910e9..5fa39ca933 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -82,6 +82,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
mask |= (1 << i);
}
m_cfg->PcieRpEnableMask = mask;
+ m_cfg->PrmrrSize = config->PrmrrSize;
+ m_cfg->EnableC6Dram = config->enable_c6dram;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)