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-rw-r--r--src/soc/intel/cannonlake/include/soc/cpu.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h
index bde8f28f1a..dfc7183910 100644
--- a/src/soc/intel/cannonlake/include/soc/cpu.h
+++ b/src/soc/intel/cannonlake/include/soc/cpu.h
@@ -21,13 +21,13 @@
#include <device/device.h>
#include <intelblocks/msr.h>
-/* Latency times in units of 1024ns. */
-#define C_STATE_LATENCY_CONTROL_0_LIMIT 0x4e
-#define C_STATE_LATENCY_CONTROL_1_LIMIT 0x76
-#define C_STATE_LATENCY_CONTROL_2_LIMIT 0x94
-#define C_STATE_LATENCY_CONTROL_3_LIMIT 0xfa
-#define C_STATE_LATENCY_CONTROL_4_LIMIT 0x14c
-#define C_STATE_LATENCY_CONTROL_5_LIMIT 0x3f2
+/* Latency times in units of 32768ns */
+#define C_STATE_LATENCY_CONTROL_0_LIMIT 0x9d
+#define C_STATE_LATENCY_CONTROL_1_LIMIT 0x9d
+#define C_STATE_LATENCY_CONTROL_2_LIMIT 0x9d
+#define C_STATE_LATENCY_CONTROL_3_LIMIT 0x9d
+#define C_STATE_LATENCY_CONTROL_4_LIMIT 0x9d
+#define C_STATE_LATENCY_CONTROL_5_LIMIT 0x9d
/* Power in units of mW */
#define C1_POWER 0x3e8