diff options
Diffstat (limited to 'src/soc/intel/cannonlake/include')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/ramstage.h | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h deleted file mode 100644 index 4a96185e6b..0000000000 --- a/src/soc/intel/cannonlake/include/soc/ramstage.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015-2017 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_RAMSTAGE_H_ -#define _SOC_RAMSTAGE_H_ - -#include <chip.h> -#include <device/device.h> -#include <fsp/api.h> -#include <fsp/util.h> - -void mainboard_silicon_init_params(FSP_S_CONFIG *params); -void soc_init_pre_device(void *chip_info); - -#endif |