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-rw-r--r--src/soc/intel/cannonlake/include/soc/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h
index dfc7183910..1e3e2b4cb1 100644
--- a/src/soc/intel/cannonlake/include/soc/cpu.h
+++ b/src/soc/intel/cannonlake/include/soc/cpu.h
@@ -37,6 +37,9 @@
#define C9_POWER 0xc8
#define C10_POWER 0xc8
+/* Common Timer Copy (CTC) frequency - 24MHz. */
+#define CTC_FREQ 24000000
+
#define C_STATE_LATENCY_MICRO_SECONDS(limit, base) \
(((1 << ((base)*5)) * (limit)) / 1000)
#define C_STATE_LATENCY_FROM_LAT_REG(reg) \