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-rw-r--r--src/soc/intel/cannonlake/chip.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 6517b9e882..947cd65718 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -197,8 +197,22 @@ struct soc_intel_cannonlake_config {
/* HeciEnabled decides the state of Heci1 at end of boot
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
+
+ /* PL1 Override value in Watts */
+ uint32_t tdp_pl1_override;
/* PL2 Override value in Watts */
uint32_t tdp_pl2_override;
+ /* SysPL2 Value in Watts */
+ uint32_t tdp_psyspl2;
+ /* SysPL3 Value in Watts */
+ uint32_t tdp_psyspl3;
+ /* SysPL3 window size */
+ uint32_t tdp_psyspl3_time;
+ /* SysPL3 duty cycle */
+ uint32_t tdp_psyspl3_dutycycle;
+ /* PL4 Value in Watts */
+ uint32_t tdp_pl4;
+
/* Intel Speed Shift Technology */
uint8_t speed_shift_enable;
/* Enable VR specific mailbox command